Department of Electronics & Communication Engineering

Indian Institute of Information Technology Manipur

Registration now open, No Registration Fee, Seat Limit=50, Last Date of Registration: 25.01.2020, Event is supported by TEQIP III


February 10th-14th,2020

FDP Coordinators:
Dr. Gaurav Saxena
Dr. Nagesh CH

About the Program

    Education in Engineering Colleges and Universities are severely lagging to meet VLSI/MEMS Industry needs as well as strategic needs of the country, this shortfall is the most in the North-Eastern region of India, such as ours. This creates a big gap between the industry and academia. By conducting a Faculty Development Program we intend to reduce this gap by training the academia on various features of VLSI/MEMS System. This training will also be beneficial to faculty who are teaching VLSI/MEMS related course or are looking for research opportunity in VLSI/MEMS Domain.

Program Highlights

  • Introduction to VLSI design
  • Analog VLSI Design
  • Digital VLSI Design
  • Hands-on-sessions on analog and digital VLSI design
  • Introduction to MEMS design
  • Industry-Academia interaction

  • About ECE Department

      The main vision of department is to create academic excellence by imparting quality teaching, carrying out research and technology development in frontier areas of Electronics and Communication Engineering, and thus to provide best-in-class human resources to the growing electronics, manufacturing & design industries in India as well as technology development in the area of national importance in particular.

    Tentative list of resource persons

  • Dr. Roy Paily, Professor, ECE Dept., IIT Guwahati.
  • Dr. Harshal Nemade, Professor, ECE Dept., IIT Guwahati.
  • Dr. Dipankar Bandyopadhyay, Professor, Chemical Engineering, IIT Guwahati
  • Dr. Babita Jajodia, Assistant Professor, ECE, IIIT Guwahati.
  • Dr. Ashish Kumar Namdeo, Chief Engineer, Samsung Research Institute Noida.
  • Dr. M Sultan M Siddiqui, R&D Manager, SYNOPSYS Inc.
  • Dr. Saroj, Assistant Professor, BITS Pilani, Hyderabad.

  • Targeted Participants

      All interested faculty members, researchers and engineering students. The number of participants are limited to 50.


    • No fee will be collected from any participant. Tea/Lunch will be provided on all days of workshop.
    • All traveling and staying expenses of the participants attending the workshops are borne by their respective colleges.
    • For registration, duly filled online Registration form available at FDP webpage. Along with the Declaration by the Head of the Department/Institute or Deans of Sections.
    • Please download the Declaration format(Required to complete the Registration): Declaration
    • Link to the Registration form: Registration Link

    Important Dates

    • Last date of online registration form: 25-01-2020
    • Notification of Selected Participants through E-mail: 27-01-2020

    Address for Communication

      Dr. Nagesh CH/Dr. Gaurav Saxena
      Coordinator, FDP on VLSI & MEMS Design
      Department of ECE, IIIT Senapati, Mantripukhri, Imphal
      Mobile: 09678554904